1. Field of the Invention
The present invention generally relates to the interconnection of electronic devices such as integrated circuit chips, and more particularly to a method of providing a temporary attachment between an integrated circuit chip and a carrier or package for testing.
2. Description of the Related Art
Integrated circuits are used for a wide variety of electronic applications, from simple devices such as wristwatches, to the most complex computer systems. A microelectronic integrated circuit (IC) chip can generally be thought of as a collection of logic cells formed on a semiconductor substrate (e.g., silicon), with electrical interconnections between the cells. An IC may include a very large number of cells and may require a large number of external metallic contacts to serve as input or output pins.
As integrated circuit designs become more complex and the size of integrated circuit chips continues to shrink, pin densities grow and it becomes increasingly more difficult to interconnect the chip to external circuitry. Chips are commonly attached to a main system substrate such as a printed circuit board (PCB) using a carrier or package which fans out the connections from the external pins of a chip to wires on the PCB. FIG. 1 illustrates a typical chip assembly 10 which includes an IC chip 12, a chip carrier 14, a PCB 16, and miscellaneous components such as capacitors 18. These various elements may be electrically coupled using surface-mount connections with controlled collapse chip connection (C4) solder ball arrays. IC chip 12 is connected to package 14 which is in turn connected to PCB 16. Package 14 and PCB 16 both have multiple horizontal layers interconnected by vertical vias. A single layer may contain multiple planes, i.e., some for wiring and others for an electrical ground plane or a power plane. A given plane in package 14 may have multiple connections to the top and bottom surfaces to couple ground or power planes of IC chip 12 to ground or power planes of PCB 16. For state-of-the-art designs, it may be necessary to connect hundreds of chip pins to respective carrier pads.